2/28/2012
Written by
University of Illinois computer science professor Sarita Adve was named the Anita Borg Institute Women of Vision Award Winner in the Innovation category. Adve is being honored for her immense contributions to the area of hardware and software memory consistency models. The Women of Vision Awards honor women making significant contributions to technology in Innovation, Leadership, and Social Impact. Candidates for the awards are considered based on their records of (1) consistent, significant contributions to technology invention and application; (2) effecting positive changes in the ways in which technology impacts society; and (3) demonstrated leadership in the technology industry that extends beyond their place of work.
The memory consistency model lies at the heart of the semantics of any threaded software or hardware. Arguably, it has been one of the most challenging and contentious areas in concurrent hardware and software specification for many years. There is finally now a convergence in both the hardware and software communities. Adve has been a common thread and a leader in the multiple community-scale efforts that have driven this convergence.
The memory consistency model is a hardware/software interface, affecting programmability and performance. Unfortunately, designing a model satisfying all desirable properties has proven difficult. Sequential consistency is simplest to program, but most systems do not provide it for performance reasons. Instead, we had divergent models (often ambiguously specified) for different hardware.
Adve’s early work departed from the prevalent hardware-centric approaches to use a combined hardware/software view more appropriate for an interface. She observed that for well-synchronized programs (which she formalized as data-race-free), both sequential consistency and high performance can be provided. She developed a comprehensive framework to specify memory models as providing “sequential consistency for data-race-free programs.” Adve’s data-race-free model forms the foundation of the memory models for Java and C++.
In addition, Adve has also been a leader in power- and reliability-aware architectures. Her group was among the first to recognize that significant power reductions required breaking traditional system boundaries in favor of a collaborative, cross-layer system-wide power management framework.
Most recently, Adve’s work has challenged the research community to rethink how both parallel languages and parallel hardware are designed. Adve recently won honors for her DeNovo system, which exploits emerging software trends in disciplined parallel programming to make hardware simpler, higher performance, and lower energy, all at the same time. As their first step, Adve and her research team have developed a cache coherence protocol and consistency model that takes an order of magnitude less time to verify and runs some applications in less than half the time with less than half the network traffic and cache misses than the state-of-the-art. The simplicity and low network and cache traffic means that the performance increases come with significant power and energy benefits, a rarity in hardware design.
Adve serves on the Board of Directors for the Computing Research Association and received the 2008 SIGARCH Maurice Wilkes Award. Professor Adve received an IBM Faculty Award in 2005, was named a UIUC University Scholar in 2004, and received an Alfred P. Sloan Research Fellowship in 1998, an IBM University Partnership award in 1997 and 1998, and a NSF CAREER award in 1995. She is a Fellow of the ACM and IEEE.
She served on the National Science Foundation's CISE directorate's advisory committee from 2003 to 2005 and on the expert group to revise the Java memory model from 2001 to 2005. She co-led the Intel/Microsoft funded Universal Parallel Computing Research Center (UPCRC) at Illinois as its director of research in its founding year (2008-09). She currently serves on the board of directors for ACM SIGARCH.