Architecture, Compilers, and Parallel Computing

a supercomputer installationAs we approach the end of Moore’s Law, and as mobile devices and cloud computing become pervasive, all aspects of system design—circuits, processors, memory, compilers, programming environments—must become more energy efficient, resilient, and programmable.

Our research groups explore energy efficiency via low-voltage design techniques, specialized hardware accelerators, adaptive runtime techniques in high performance computing, efficient memory architectures for heterogeneous mobile systems, novel architectures for exascale systems, and other projects. We examine resilience through tolerating variation during chip fabrication, failure-tolerant processor architectures, scalable resilience protocols, and automated software debugging and recovery techniques. We explore programmability through architectural support for synchronization, automatic parallelization and vectorization, performance-portability for heterogeneous mobile systems, high-performance implementations of scripting languages, and highly scalable parallel run-time systems.

In addition to collaborating with major companies, our software artifacts like LLVM and Charm++ are widely used in industry, government labs, and academic research.

CS Faculty and Their Research Interests

Sarita Adve parallel computing, memory architecture, power- and reliability-aware architectures 
Vikram Adve compiler infrastructures and techniques, secure architectures, heterogeneous systems 
Christopher Fletcher architectures for security and machine learning
William Gropp programming models and systems for parallel computing 
Laxmikant Kale large-scale parallel systems; runtime systems, tools, and frameworks for high-performance computing 
David Padua compiler techniques for parallel computing 
Marc Snir large-scale parallel systems, algorithms, and libraries 
Edgar Solomonik communication complexity
Lawrence Rauchwerger joining fall 2019; parallel and distributed programming environments
Josep Torrellas parallel architectures, power- and reliability-aware hardware/software architectures 
Craig Zilles compilers, dynamic optimization, computer science education 

Affiliate Faculty

Deming Chen, Electrical & Computer Engineering hardware/software co-design for system-on-chip; reconfigurable computing; GPU computing and optimization
Jian Huang, Electrical & Computer Engineering computer systems, systems architecture, systems security, memory and storage systems
Wen-mei Hwu, Electrical & Computer Engineering HPC and parallel systems, compilers, GPU programming
Nam Sung Kim, Electrical & Computer Engineering non-conventional computer architecture: bio-inspired, molecular, cellular, and analog-digital hybrid computing 
Rakesh Kumar, Electrical & Computer Engineering power- and reliability-aware architectures, approximate computing 
Steve Lumetta, Electrical & Computer Engineering parallel computing, architecture, reliability, architectures for genomic applications 
Sanjay Patel, Electrical & Computer Engineering high-performance and parallel systems
Shobha Vasudevan, Electrical & Computer Engineering system verification and security; analog and digital hardware validation 
Martin Wong, Electrical & Computer Engineering computer-aided design of integrated circuits

Adjunct Faculty

Maria J. Garzaran, Intel compilers, hardware-software interaction, software frameworks for high-performance computing
Rob A. Rutenbar, University of Pittsburgh accelerator architecture, approximate computing, FPGA, VLSI, CAD 

Architecture, Compilers, and Parallel Computing Research Efforts and Groups

Architecture, Compilers, and Parallel Computing News

Professors Marc Snir and David Padua

European Universities Honor Snir, Padua for Contributions to Parallel Computing, HPC

January 11, 2019   The École Normale Supérieure de Lyon honored Snir for decades of achievements; the Universidad de Valladolid recognized Padua as a parallel computing pioneer.
PhD student Edward Hutter

Hutter's Work On Communication Costs Leads to DOE Computational Science Graduate Fellowship

December 4, 2018   PhD student Edward Hutter's work in communication-cost analysis and reduction earns him a Department of Energy Computational Science Graduate Fellowship.
The 2018 ACM/IEEE-CS Ken Kennedy Award recognizes Prof. Sarita Adve's influential work at the interface of hardware and software.

Adve’s Research on Memory Consistency Models, Influence on Hardware and Software Worlds Recognized with Kennedy Award

October 31, 2018   The 2018 ACM/IEEE-CS Ken Kennedy Award recognizes Prof. Sarita Adve's influential work at the interface of hardware and software.
Richard T. Cheng Professor Sarita Adve

Sarita Adve Named Recipient of the ACM-IEEE CS Ken Kennedy Award

October 31, 2018  

HPCWire -- The Association for Computing Machinery and IEEE Computer Society have named Sarita Adve as the recipient of the 2018 ACM-IEEE CS Ken Kennedy Award. Also covered by CRA Bulletin.

Professor William Gropp, the Thomas M. Siebel Chair in Computer Science

Siebel Chair Gift Keeps Giving To Gropp And Illinois CS Researchers

October 12, 2018   As the Thomas M. Siebel Chair in Computer Science, Professor Bill Gropp says he has a tool that lets him jump-start interesting science.