As we approach the end of Moore’s Law, and as mobile devices and cloud computing become pervasive, all aspects of system design—circuits, processors, memory, compilers, programming environments—must become more energy efficient, resilient, and programmable.
Our research groups explore energy efficiency via low-voltage design techniques, specialized hardware accelerators, adaptive runtime techniques in high performance computing, efficient memory architectures for heterogeneous mobile systems, novel architectures for exascale systems, and other projects. We examine resilience through tolerating variation during chip fabrication, failure-tolerant processor architectures, scalable resilience protocols, and automated software debugging and recovery techniques. We explore programmability through architectural support for synchronization, automatic parallelization and vectorization, performance-portability for heterogeneous mobile systems, high-performance implementations of scripting languages, and highly scalable parallel run-time systems.
In addition to collaborating with major companies, our software artifacts like LLVM and Charm++ are widely used in industry, government labs, and academic research.
CS Faculty and Their Research Interests
||parallel computing, memory architecture, power- and reliability-aware architectures
||compiler infrastructures and techniques, secure architectures, heterogeneous systems
||architectures for security and machine learning
||programming models and systems for parallel computing
||large-scale parallel systems; runtime systems, tools, and frameworks for high-performance computing
||compiler techniques for parallel computing
||large-scale parallel systems, algorithms, and libraries
||joining fall 2019; parallel and distributed programming environments
||parallel architectures, power- and reliability-aware hardware/software architectures
||compilers, dynamic optimization, computer science education
|Deming Chen, Electrical & Computer Engineering
||hardware/software co-design for system-on-chip; reconfigurable computing; GPU computing and optimization
|Jian Huang, Electrical & Computer Engineering
||computer systems, systems architecture, systems security, memory and storage systems
|Wen-mei Hwu, Electrical & Computer Engineering
||HPC and parallel systems, compilers, GPU programming
|Nam Sung Kim, Electrical & Computer Engineering
||non-conventional computer architecture: bio-inspired, molecular, cellular, and analog-digital hybrid computing
|Rakesh Kumar, Electrical & Computer Engineering
||power- and reliability-aware architectures, approximate computing
|Steve Lumetta, Electrical & Computer Engineering
||parallel computing, architecture, reliability, architectures for genomic applications
|Sanjay Patel, Electrical & Computer Engineering
||high-performance and parallel systems
|Shobha Vasudevan, Electrical & Computer Engineering
||system verification and security; analog and digital hardware validation
|Martin Wong, Electrical & Computer Engineering
||computer-aided design of integrated circuits
|Maria J. Garzaran, Intel
||compilers, hardware-software interaction, software frameworks for high-performance computing
|Rob A. Rutenbar, University of Pittsburgh
||accelerator architecture, approximate computing, FPGA, VLSI, CAD
Architecture, Compilers, and Parallel Computing Research Efforts and Groups
Architecture, Compilers, and Parallel Computing News
September 18, 2019
Prof. Sarita Adve was invited to share work done by the EPOCHS project, which is part of the $1.5 billion Electronics Resurgence Initiative.
September 10, 2019
The gathering is a chance to learn from some of the recipients of the top awards in mathematics and computer science.
September 5, 2019
New faculty bring expertise in everything from natural language processing, robotics, and security to biomedical informatics.
August 20, 2019
Kale has retired after devoting much of his career to parallel computing, working to enhance performance and productivity. His ideas are embodied in Charm++.
August 19, 2019
Asst. Professor Christopher Fletcher Wants to Elevate Security In The Push To Reinvent Computer Architecture